Friday, March 23, 2012

ARM big.LITTLE

http://www.arm.com/zh/products/processors/technologies/bigLITTLEprocessing.php

2 models:

Task Migration Use Model
In the big.LITTLE task migration use model the OS and applications only ever execute on Cortex-A15 or
Cortex-A7 and never both processors at the same time. This use-model is a natural extension to the
Dynamic Voltage and Frequency Scaling (DVFS), operating points provided by current mobile platforms
with a single application processor to allow the OS to match the performance of the platform to the
performance required by the application.
However, in a Cortex-A15-Cortex-A7 platform these operating points are applied both to Cortex-A15 and
Cortex-A7. When Cortex-A7 is executing the OS can tune the operating points as it would for an existing
platform with a single applications processor. Once Cortex-A7 is at its highest operating point if more
performance is required a task migration can be invoked that picks up the OS and applications and
moves them to Cortex-A15.


big.LITTLE MP Use Model

Since a big.LITTLE system containing Cortex-A15 and Cortex-A7 is fully coherent through CCI-400
another logical use-model is to allow both Cortex-A15 and Cortex-A7 to be powered on and
simultaneously executing code. This is termed big.LITTLE MP, which is essentially Heterogeneous MultiProcessing. Note that in this use model Cortex-A15 only needs to be powered on and simultaneously
executing next to Cortex-A7 if there are threads that need that level of processing performance. If not,
only Cortex-A7 needs to be powered on.
big.LITTLE MP is compelling because it enables threads to be executed on the processing resource that
is most appropriate. Compute intensive threads that require significant amounts of processing
performance, as their output is user visible, can be allocated to Cortex-A15. Threads that are I/O heavy
or that do not produce a result that is time critical to the user can be executed on Cortex-A7.

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